099. Lsr 零页,X 寻址

添加 LSR Zero Page,X。

第 99 / 356 · tests/chapter_01_cpu/test_099_LSR_zero_page_x.py

在这一步中，为测试 098 中的 Zero Page LSR 形式添加 X 变址。

文件与符号

emulator/cpu/opcodes.py: lsr_zero_page_x, OPCODE_TABLE[0x56]

为什么需要这一步

这次改动通过将已有的 zero_page_x 解析器与内存 lsr 组合，添加了带变址的零页 LSR；它没有引入新的移位语义。

本步骤的建议实现

# emulator/cpu/opcodes.py
def lsr_zero_page_x(cpu: CPU):
    addr = zero_page_x(cpu)
    lsr(cpu, addr)

OPCODE_TABLE = {
    # existing entries unchanged
    0x56: lsr_zero_page_x,
}

重要不变量

有效地址计算在零页内环绕为 8 位
只消耗一个操作数字节，因此包含操作码在内 PC 前进两字节
lsr 负责内存写入以及 C/Z/N 的变化
X 用于选定目标地址，其本身不会被修改

常见误解

基址 0xFE 加上 X=0x03 指向的是 $0001，而不是 $0101。

本步骤不涉及

测试 100-101 中的 LSR Absolute 与 Absolute,X
对寻址或 LSR 行为的改动
周期时序

运行本课

uv run pytest tests/chapter_01_cpu/test_099_LSR_zero_page_x.py -v

示例实现

本步骤的建议实现

# emulator/cpu/opcodes.py
def lsr_zero_page_x(cpu: CPU):
    addr = zero_page_x(cpu)
    lsr(cpu, addr)

OPCODE_TABLE = {
    # existing entries unchanged
    0x56: lsr_zero_page_x,
}

查看测试代码test_099_LSR_zero_page_x.py

import inspect

from emulator.bus.cpu_bus import CpuBus
from emulator.cpu import opcodes
from emulator.cpu.cpu import CPU
from emulator.memory.fake_rom import FakeROM


def make_cpu_with_rom():
    rom = FakeROM()
    rom.write(0x7FFC, 0x00)
    rom.write(0x7FFD, 0x80)
    bus = CpuBus(program_rom=rom)
    return CPU(bus), bus, rom


def test_lsr_zero_page_x_handler_exists_and_is_in_opcode_table():
    """Objective: create lsr_zero_page_x(cpu) and add 0x56 to OPCODE_TABLE."""
    assert hasattr(opcodes, "lsr_zero_page_x")
    assert callable(opcodes.lsr_zero_page_x)
    assert list(inspect.signature(opcodes.lsr_zero_page_x).parameters) == ["cpu"]
    assert opcodes.OPCODE_TABLE[0x56] is opcodes.lsr_zero_page_x


def test_opcode_56_lsr_zero_page_x_shifts_indexed_memory_value():
    """Objective: 56 20 with X=0x04 shifts RAM[$0024]."""
    cpu, bus, rom = make_cpu_with_rom()
    rom.write(0x0000, 0x56)
    rom.write(0x0001, 0x20)
    bus.write(0x0024, 0b0000_0110)

    cpu.reset()
    cpu.x = 0x04
    cpu.step()

    assert bus.read(0x0024) == 0b0000_0011
    assert cpu.pc == 0x8002


def test_opcode_56_lsr_zero_page_x_wraps_zero_page_address():
    """Objective: zero-page indexed addresses wrap to 8 bits."""
    cpu, bus, rom = make_cpu_with_rom()
    rom.write(0x0000, 0x56)
    rom.write(0x0001, 0xFE)
    bus.write(0x0001, 0x04)

    cpu.reset()
    cpu.x = 0x03
    cpu.step()

    assert bus.read(0x0001) == 0x02
    assert cpu.pc == 0x8002

测试函数 (3)

test_lsr_zero_page_x_handler_exists_and_is_in_opcode_table
test_opcode_56_lsr_zero_page_x_shifts_indexed_memory_value
test_opcode_56_lsr_zero_page_x_wraps_zero_page_address